I. Field of the Invention
The invention relates generally to electro-acoustic charge transport devices and, more particularly, to monolithic integrated circuit devices containing heterostructure acoustic charge transport (HACT) and heterostructure insulated gate field effect transistor (HIGFET) devices fabricated on a same substrate.
II. Discussion of the Related Art
Acoustic charge transport devices having a delay line using a surface acoustic wave (SAW) generating transducer to launch a series of acoustic waves through a layered piezoelectric semiconductor structure have been developed relatively recently. Such devices use an acoustic wave passing through the piezoelectric semiconductor to form a series of potential wells that transport packets of charge, together with the wave, along the semiconductor material. Further developments include improvements related to confining the mechanism within specific areas of the piezoelectric material such that the transport mechanism is confined to one or more discrete transport channel layers within the material so that the location of the charge packet can be more accurately defined for use.
Generally, in these devices, transducers are utilized for launching surface acoustic waves along a propagation axis. The waves are characterized by maxima and minima of electrical potential which can be used to transport electrical charge such as provided to it. A first input electrode is utilized to provide input electric charge to the surface acoustic waves by conduction to the transport channel. The surface acoustic waves are transported along the transport channel carrying the charge packets within, provided that there is lateral and vertical electric potential confinement, until the wave reaches a connection to an output electrode which receives the transported signals. In this manner, sampled input signals in the form of the electrical packets can be transported readily at predictable speed through the material.
One such device which uses heterostructure quantum wells to confine the charge packets to the discrete channels is illustrated and described in U.S. Pat. No. 4,893,161 to William J. Tanski, et al. Another device which incorporates a barrier transport channel made by forming a portion of a layer of piezoelectric semiconductor material between confining layers in which majority carriers are depleted from the channel and an electrical signal is thereafter injected into the channel such that a delayed version of the electrical signal which has been carried along by the surface acoustic wave can be extracted from the channel is illustrated and described in U.S. Pat. No. 4,633,285.
It is also known to provide a monolithic device having a heterostructure acoustic charge transport (HACT) device monolithically integrated with a modulation doped field effect transistor (MODFET) on the same substrate. Such a device is disclosed in U.S. Pat. No. 4,884,001 to Robert N. Sacks and William J. Tanski, co-inventors in the present application. That device is characterized by a sequence of epitaxial layers comprising the MODFET fabricated as the uppermost layers in a multi-layer heterostructure with the HACT device fabricated in a partially overlapping, adjacent section using layers beneath the level of the MODFET, after selected upper ones have been partially removed, to form a monolithic device.
In addition to MODFETs, there has been an effort to combine ion implanted metal semiconductor field effect transistors (MESFETs) with acoustic charge transfer devices built of N.sup.- epitaxial GaAs layers. These integrated devices do have a high operating frequency, however, they are not heterostructure devices, require relatively high power and have a relatively small dynamic range.
It is also known to fabricate heterostructure insulated gate field effect transistors (HIGFETs) on a common planar wafer surface (e.g., semi-insulating gallium arsenide (GaAs) wafer substrate) using known molecular beam epitaxy (MBE) techniques. Such a device is shown in U.S. Pat. No. 4,814,851 to Abrokwah, et al. In that system, the heterostructure used for the HIGFETs consists of an undoped GaAs buffer layer grown on the semi-insulating GaAs substrate followed by an undoped AlGaAs gate layer. This can be used to make both n- and p- channel HIGFETs which utilize the high mobility, two-dimensional (2 D) electron (hole) gas which is induced at the (AlGa)As-GaAs hetero-surface by the application of a suitable gate biased voltage. A self-aligned gate (SAG) process is used to form the source and drain regions of the transistors with p.sup.+ implanted regions for the p-channel and n.sup.+ implanted regions for n channel HIGFETs. Such devices are characterized by their low energy consumption, high processing yield and high circuit density.
Heretofore, it has not been possible to combine the distinct electronic advantages of compact HIGFET heterostructure design with HACT in an integrated HACT/HIGFET monolithic integrated circuit device. It would be quite advantageous if the HIGFET control electronics could be used to program and read out the HACT device in an integrated, monolithic IC structure. This would greatly enhance the signal processing capabilities of the HACT device and provide small, highly reliable devices with low pick-up noise.